Ip Caching for Terabit Speed Routers
نویسندگان
چکیده
As network speeds continue to grow, current methods of translating destination IP addresses to output port numbers during routing become inadequately slow. Eventhough this lookup is often performed in hardware, it may still be limited by DRAM access latencies. We present a method of speeding up access to DRAM based lookup mechanisms by more than a factor of 10 using CPU style memory caches. Real IP router traces are used to validate the caching scheme as well as study some IP address properties that may affect caching performance.
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